Abstract
Considers system-level synthesis as the problem of optimally mapping a task-level specification onto a heterogeneous hardware/software architecture. This problem requires: (1) the selection of the architecture (allocation), including general-purpose and dedicated processors, ASICs, buses and memories; (2) the mapping of the algorithm onto the selected architecture in space (binding) and time (scheduling); and (3) the design space exploration, with the goal of finding a set of implementations that satisfy a number of constraints on cost and performance. In this paper, a new graph-based mapping model is introduced to specify the task of system-level synthesis as an optimization problem. An evolutionary algorithm is adapted to solve this problem and is applied to explore the design space of video-codec implementations.
Keywords
Computer scienceDesign space explorationImplementationComputer architectureScheduling (production processes)GraphArchitectureDistributed computingCodecHigh-level synthesisTheoretical computer scienceSet (abstract data type)Parallel computingEmbedded systemField-programmable gate arrayMathematical optimizationProgramming languageComputer hardware
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Publication Info
- Year
- 2002
- Type
- article
- Pages
- 167-171
- Citations
- 44
- Access
- Closed
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Cite This
Jürgen Teich,
Tobias Blickle,
Lothar Thiele
(2002).
An evolutionary approach to system-level synthesis.
, 167-171.
https://doi.org/10.1109/hsc.1997.584597
Identifiers
- DOI
- 10.1109/hsc.1997.584597