Abstract

Scaling the Si MOSFET is reconsidered. Requirements on subthreshold leakage control force conventional scaling to use high doping as the device dimension penetrates into the deep-submicrometer regime, leading to an undesirably large junction capacitance and degraded mobility. By studying the scaling of fully depleted SOI devices, the important concept of controlling horizontal leakage through vertical structures is highlighted. Several structural variations of conventional SOI structures are discussed in terms of a natural length scale to guide the design. The concept of vertical doping engineering can also be realized in bulk Si to obtain good subthreshold characteristics without large junction capacitance or heavy channel doping.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Keywords

Subthreshold conductionScalingCapacitanceSilicon on insulatorMOSFETDopingLeakage (economics)Materials scienceSubthreshold slopeOptoelectronicsElectrical engineeringElectronic engineeringSiliconTransistorEngineeringPhysicsVoltageMathematicsElectrode

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Publication Info

Year
1992
Type
article
Volume
39
Issue
7
Pages
1704-1710
Citations
879
Access
Closed

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Ran Yan, A. Ourmazd, K.F. Lee (1992). Scaling the Si MOSFET: from bulk to SOI to bulk. IEEE Transactions on Electron Devices , 39 (7) , 1704-1710. https://doi.org/10.1109/16.141237

Identifiers

DOI
10.1109/16.141237